1. Field of the Invention
This invention relates to the testing of a semiconductor dielectric and more particularly to precision quantification of charge carrier traps within the dielectric.
2. Description of the Relevant Art
Dielectric charge traps present several problems in the semiconductor industry. A detailed description of dielectric charge traps and much of the related prior art can be found in MOS Physics and Technology, E. H. Nicollian and J. R. Brews (1982) pp. 424-443 (herein incorporated by reference). Charge traps are located at the interface between the dielectric and adjacent conductors as well as within the dielectric bulk. Charge traps are generally caused by defects in the dielectric. The most common defects result from impurities or irregular bonds formed in the bulk or interface region. A large quantity of irregular bonds exist as "broken bonds" at the dielectric interface region. The defects provide locations for charges to exist and migrate to. Thus, defects produce traps, wherein traps are usually uncharged but become charged when free electrons and free holes are introduced into the dielectric.
Oxide, e.g., SiO.sub.x (1.0&lt;x&lt;2.0), is a common example of the most commonly used dielectric in the semiconductor industry. If one of the oxygen atoms is missing from the oxide structure thereby producing a broken bond, a silicon atom will be left with what is commonly referred to as a "dangling bond". A dangling bond resulting therefrom will produce a corresponding hole which attracts and traps charge carriers that invade the oxide during manufacture (i.e., diffusion, implantation, etc.) and operation (electrical activation) of the semiconductor device.
Presence of a large number of charge traps in a dielectric may cause retainage problems in a device embodying memory. Charge carriers generated during device operation enter and become trapped in the oxide between the memory conductive plates. In such instances, memory characteristics are altered--either read or write capability of the corresponding memory cell. Additionally, during device fabrication, electron-hole pairs can be created predominantly during the ion implant stage. The electron-hole pairs create more trap cites and allow for further deterioration of device operability.
Other examples of devices that are prone to the problems arising from dielectric charge traps include n-channel MOSFETS, multilayer gate memory, and high voltage diodes. In n-channel MOSFETS, hot electrons originating from the surface channel or silicon substrate migrate to and affix in the gate oxide (i.e., dielectric) charge traps. The trapped charges cause transconductance degradation and threshold voltage drift with time. In multilayer gate memory applications, information is generally written and erased by electron transport between the substrate silicon and charge storage sites through the tunnel area of the gate oxide. As these electrons become trapped and accumulate as oxide charge, the current across the oxide decreases to a point during which memory function ceases. In high voltage diode applications, the diodes are frequently operated in the voltage range necessary to cause avalanche breakdown. Traps in the oxide cause the avalanche breakdown voltage to skew after repeated operations and over a period of time.
Since charge traps can have unwanted effects on device characteristics, the semiconducting industry has developed several tests to monitor and examine these traps. Determination of trap distribution is necessary to quantify the effects of traps on dielectric quality and, therefore, device operability. Two popular methods for finding trap distributions include etch-off method and the photo I-V method. The etch-off method profiles the trap distribution by repeatedly etching off layers of oxide and measuring the amount of traps at each level using radioactive or capacitance-voltage (C-V) techniques. The photo I-V method is nondestructive and more accurate than the etch-off method, but it has limited capabilities in measuring deep oxide traps.
Measurements of bulk oxide trap properties can also be performed by avalanche injecting electrons into the dielectric and determining the C-V curve. Avalanche injection creates a voltage shift in the C-V curve which is a measure of the negative charge density within the dielectric. The voltage shift is also known as the flatband voltage shift. The results can be interpreted according to methods described in MOS Physics and Technology, pp 531-553 (herein incorporated by reference).
Other measurements of dielectric charge traps depend on the activation energies of the intrinsic ion carriers located at dielectric trap sites. Ion impurities enter the dielectric during manufacture of the semiconductor device. Diffused or implanted impurities such as dopants migrate to and affix within the dielectric at the trap sites. Thus, charge carriers are said to "populate" traps. Different types of ion carriers require different levels of energy to release from traps or "depopulate." The energy required for a specific carrier to depopulate a trap is labeled as carrier activation energy, or Q.sub.c.
Conventional knowledge associates measurement of dielectric charge traps as a function of carrier activation energy, and carrier activation energy is a function of temperature. A bias can be applied across a semiconductor dielectric. The dielectric is then heated to specific temperatures. At each temperature, the current flowing through the dielectric is measured. Current initiates when the temperature creates enough energy to depopulate ion carriers from the traps. The energy (E) applied to the dielectric at a specific temperature (T) is: EQU E=kT Equ. (1)
where k is Boltzmann's constant. When the energy reaches the carrier activation energy of a specific class of carrier, those carriers are mobilized from the dielectric traps. The applied bias attracts the carriers in one direction and produces a current that can be measured. As the temperature is raised to different levels, different activation energies are reached and different types of ion carriers are mobilized from the traps.
The aforementioned test produces data showing current versus energy as a function of temperature. The current peaks at specific temperature points. These peaks indicate the activation energies for specific types of carriers. The type of ion carriers are then identified by comparing the activation energies experimentally obtained to known tables of activation energies. The quantity of each type of carrier within the dielectric (in bulk or at the interface) is then determined by the amount of current corresponding to each carrier type.
Determining dielectric characteristics with temperature has several drawbacks.. Temperature often does not give the precision required for proper measurements. When the dielectric is heated to a specific temperature correlating to a certain carrier activation energy, not all of those carriers will mobilize from the traps. The activation of carriers from trap sites will follow a Maxwell-Boltzmann distribution. The Boltzmann relation expresses the probability of finding a carrier at an energy .DELTA.E greater than the average energy at a particular temperature T: EQU probability.varies.e.sup.-E/kT Equ. ( 2)
At a specific activation energy determined by a given temperature, not all of the appropriate ion carriers will mobilize from the dielectric traps. The only way to mobilize all of the carriers related to a specific activation energy is to overshoot the temperature or extend temperature exposure over a period of time. The process of collecting current measurements at many different temperatures becomes a slow task. Therefore, a faster method for testing dielectric characteristics is needed.
Another problem with using temperature to determine dielectric characteristics is the inability to distinguish between some carriers. Some types of dielectric traps will have carrier activation energies that are close together. Between the temperature gradient in the dielectric and the effects of the Maxwell-Boltzmann energy distribution, the test cannot distinguish between the depopulation of different traps having similar carrier activation energies. It is difficult to gather a precise quantity of mobilized charge carriers depopulated with temperature. Hence, a test method with a more precise method of determining dielectric characteristics is needed.
Still another problem with using temperature to characterize dielectrics is that high temperatures can harm a semiconductor. Some dielectric traps have activation energies so high that depopulating the carriers from the traps require temperatures high enough to anneal the semiconductor and change the properties of the semiconductor elements. This creates more unpredictable devices. A better method for determining dielectric characteristics of carriers with high activation energies is needed.